Tech appeal lures private equity to ponder big deals Jun 13, 2007
What's more, cash-stuffed funds appear to be trolling for some sizable fish; speculation has circulated that EDA giant Cadence Design Systems Inc., for example, is on firms' radar. Indeed, in today's exuberant market, it's not unthinkable--though it's certainly still unlikely--that a deep-pocketed investor group might be so bold as to make a play for Intel Corp.. (EETimes)
President Bush Participates in Joint Press Availability with President Parvanov of Bulgaria Jun 12, 2007
And I would hope that the Russians would see the meetings as beneficial and our meetings -- realize our true intent, and hopefully design systems that protect us all. PRESIDENT PARVANOV: I would like to begin by saying that we welcome the strategic dialogue, and it was described as a strategic dialogue by both leaders, both by President Bush and by Putin, a dialogue which started within the framework of G8. (White House News Releases)
Septic setbacks made consistent again Jun 12, 2007
"It eliminated so much ground from these small lots that septic engineers weren't able to design systems for them," said Mike Borean, president of the Calaveras County Builders Association. In discussing the issue, committee members concluded that differing interpretations of the codes was at the root of the problem. (The Union Democrat)
IBM Bids SK5.2 Billion in Cash for Sweden's Telelogic (Update4) Jun 12, 2007
2 billion kronor ($743 million), adding software design systems used by DaimlerChrysler AG and ABB Ltd.. IBM offered 21 kronor in cash for each Telelogic share, about 21 percent more than the closing share price on May 31, before speculation about a takeover started, the Malmoe, Sweden- based company said today in a statement. (Bloomberg)
Wally Rhines vs. the 'incumbent gorillas' Jun 12, 2007
While it offers some promising technology, and has gotten a good reception, Sierra's Olympus-SoC currently holds a distant number four market position compared to Synopsys, Cadence Design Systems, and Magma Design Automation ... The Mentor/Sierra acquisition is a wake-up call to the incumbents that they've got to provide fully capable 65/45 nm design systems as soon as possible. (EETimes)
Competitors disdain Mentor's Sierra acquisition Jun 12, 2007
Synopsys, Cadence Design Systems, and Magma Design Automation all seem to regard Mentor's Sierra acquisition as a minimal threat, and their own positions in 65/45 nm IC design as strong ... Eric Filseth, vice president of Encounter and DFM marketing at Cadence Design Systems, said that Sierra's toolset has so far been used as "a fast multicorner optimizer, a specialty tool which was plugged into their customers' main flows after routing but before metal fill. They have a lot of work ahead to... (EETimes)
Mentor buys Sierra Design for $90 million Jun 12, 2007
Its significance lies in giving Mentor a complete range of electronic design tools, comparable to its leading competitors, Cadence Design Systems Inc. and Synopsys Inc.. Arguably, Sierra Design puts Mentor in even a better position than its rivals. (San Jose Business Journal, CA)
Bidding for top spot in IC design, Mentor buys Sierra Jun 11, 2007
Mentor has instead developed a reputation for providing just about everything else, leaving a big "doughnut hole" for IC implementation that's filled by Cadence Design Systems, Synopsys and Magma Design Automation. Mentor, which has long declared its intention only to enter markets where it can become the No. 1 provider, thinks it can leapfrog all of them. (EETimes)
OEMs go direct to foundry as chip market slows Jun 8, 2007
Companies are working a variety of strategies ranging from mergers such as the combination of LSI Logic and Agere Systems to private equity deals struck by Freescale and NXP. However, Lewis poured cold water on rumors that private equity firms would buy up and combine Cadence Design Systems and Mentor Graphics. "That would be biting off much more than anyone could handle," he said. (EETimes)
Synopsys awards competitors for low power effort Jun 7, 2007
Another effort called the is backed by Cadence Design Systems. At DAC, Cadence announced that Realtek Semiconductor Corp. has completed an aggressive low-power design using the Cadence Logic Design Team Solution that includes CPF, now under the aegis of the. (EETimes)
Cadence private: good or bad for customers? Jun 6, 2007
Reports in the New York Times that Cadence Design Systems Inc. is in discussions with equity firms Kohlberg Kravis Roberts and The Blackstone Group to go private. This caused a run-up in Cadence's stock price Monday. (EETimes)
DAC special: Video interview with Cadence's Ted Vucurevich Jun 6, 2007
SAN DIEGO chief technology officer at Cadence Design Systems, discussed automotive design with EE Times software editor Richard Goering during the Design Automation Conference. eeProductCenter Launches SpecSearch, New Parametric Parts Search Engine In our continuing effort to enhance our site, eeProductCenter introduces SpecSearch powered by GlobalSpec. (EETimes)
Cadence in talks to go private, says report Jun 6, 2007
SAN DIEGO DA giant Cadence Design Systems Inc. is in discussions with equity firms to go private, according to a report from the New York Times. Cadence has been in talks with Kohlberg Kravis Roberts and The Blackstone Group, according to the report. (EETimes)
Palm backer cites software prowess Jun 5, 2007
"We're incredibly well positioned to pursue that opportunity," said Ed Colligan, Palm president and CEO. "We have a broad range of software efforts underway here. Software is the battleground of the future." Palm continues to design systems infrastructure, applications, and services, which it's extending into different form factors, including its new , he added. Once the deal closes, McNamee is set to join Palm's board of directors along with his colleague at Elevation, Fred Anderson, Apple's... (InfoWorld)
Multicore platforms challenge EDA software Jun 5, 2007
All of the largest EDA vendors--Cadence Design Systems Inc., Synopsys Inc., Mentor Graphics Corp. and Magma--acknowledge that multicore support will be essential in the future, and all four claim some multithreading and multicore capabilities today. And some recent tools have supported multiprocessing out of the chute. (EETimes)
Commercial Ratings Commission to Meet Jun 4, 2007
Rather, the group wants to share information about how software systems are handling the new data and design systems and processes aimed at standardizing commercial minutes as a measurement tool. Among those scheduled to attend are top executives from the CAB, A&E Television Networks, Discovery Communications, Comcast, ABC, NBC, Fox, advertising agencies and , the leading supplier of data-processing and information-management services to the advertising industry. (Multichannel News)
Stocks Fall on China Collapse Jun 4, 2007
Cadence Design Systems () has held separate negotiations to be acquired by Kohlberg Kravis Roberts and the Blackstone Group, according to anonymouse sources cited in an published Monday by The New York Times. Cadence writes software used to make computer chips. (SmartMoney)
Cadence Design in buyout talks Jun 4, 2007
NEW YORK: Cadence Design Systems Inc., a maker of software for designing microchips, is in talks with at least two buyout firms about a possible sale, the New York Times reported in its online edition on Monday. Cadence has held talks with Kohlberg Kravis Roberts [KKR.UL] and The Blackstone Group [BG.UL], according to the report, which cited people close to the matter. (India Times, India)
Full Story » Jun 1, 2007
Peterson is currently in marketing management with Cadence Design Systems, Inc., an international corporation with a branch in Louisville, Colo. Cadence is a world leader in electronic design automation (EDA) technologies and engineering services, according to its Web site www. (Boulder Colorado Daily, CO)
A "what's hot" list for DAC 2007 May 31, 2007
ChipVision Design Systems Booth: 6378 What's new: focused on low-power designs, claiming pre-RTL power savings of up to 75 percent ... Forte Design Systems Booth: 3660 What's new: Forte claims a by linking its Cynthesizer electronic system level (ESL) synthesis tool to Magma Design Automation's Blast Create. (EETimes)
Brion targets designers with lithography tool May 30, 2007
Brion is offering Tachyon LAD through its initial EDA partners: Cadence Design Systems, Magma Design Automation, and Japanese provider Tool Corp. "Brion is entering the design market as a supplier of core modeling technology, but not as a supplier of IC implementation tools," Gianfagna said. "We plan to leverage existing tools and channels, and partner with EDA companies to introduce this information into their design flows.". (EETimes)
Cadence attacks assertion-based verification bottlenecks May 30, 2007
Claiming to reduce key bottlenecks in assertion-based verification, Cadence Design Systems has announced enhancements to the "design with verification" component of its Cadence Logic Design Team Solution. The new capabilities address the growing verification gap between design and verification teams that exist in current RTL methodologies, the company claims. (EETimes)
Products line up for DAC debut May 29, 2007
ChipVision Design Systems Booth 6378 What's new: Electronic system-level synthesis technology focused on low-power designs, claiming pre-RTL power savings of up to 75 percent ... Forte Design Systems Booth 3660 What's new: Forte claims a SystemC-to-GDSII design capability by linking its Cynthesizer electronic system-level synthesis tool to Magma Design Automation's Blast Create. (EETimes)
EDA startup claims 24-percent die area reduction May 29, 2007
Andersen explained that all current RTL synthesis tools, offered by Cadence Design Systems Inc. (San Jose, California), Magma Design Automation Inc. (Santa Clara, California) and Synopsys Inc. (Mountain View, California), rely on a predefined standard cell library. The libraries are created independently and are re-used for different types of design. (EETimes)
Forte claims SystemC-to-GDSII flow May 26, 2007
Forte Design Systems next week (May 28) will claim to provide it with Cynthesizer version 3. 3, a new release of its electronic system level (ESL) synthesis tool that adds integration with Magma Design Automation's Blast Create synthesizer. (EETimes)
Blog Main Page May 25, 2007
The EDA rumor mill is buzzing these days about a number of supposed acquisitions, but one that apparently isn't happening is Cadence Design Systems buying Clear Shape. And somehow, I seem to have become part of that rumor myself. (EETimes)
Cooley survey: SystemVerilog up, SystemC down May 25, 2007
Part one of the survey, concluded that engineers are increasingly shunning specialized verification languages, are continuing to embrace Verilog, and are shifting slightly towards Synopsys and away from Cadence Design Systems in simulation ... The most commonly used SystemC tool is the free Open SystemC Initiative simulator, followed by Cadence Design Systems' Cadence NC-SystemC. ... The 2007 survey also turned up some usage of "bug hunter" tools from Mentor Graphics, Synopsys, Jasper Design... (EETimes)
Routing experts launch 'interconnect synthesis' startup May 24, 2007
After working for AT Labs, AMD, and PiE Design Systems, Li joined Avanti, then called ArcSys, in 1995 ... A fourth founder, Hsi-Chuan Chen, was briefly at Avanti and then helped develop First Encounter at Silicon Perspective Corp. (SPC) before its acquisition by Cadence Design Systems. (EETimes)
In praise of the heavy spender May 22, 2007
This means more selection and better-trained floor help as well as computer-aided design systems and suites of innovative kitchen layouts arranged in ways that heavy spenders could readily sense what they'd be getting for their money. Home Depot's bet was that although the department's servicing costs would rise in the heavy-spender model, revenue and gross margin would increase even more. (Globe and Mail -- Business)
Photo Release -- Foundry Redefines the High-End Switching Market With the World's Most Powerful and Energy Efficient Routing Switch May 22, 2007
Cadence Design Systems, Inc. (NasdaqGS: - ) is the world's leading electronic design automation (EDA) technologies and engineering services company ... We recently upgraded our data center network core with several Foundry BigIron RX Series switches and we will continue to actively seek viable solutions to manage the growing capacity surge in network traffic,'' said Dan Salisbury, vice president of IT for Cadence Design Systems. (Primezone Releases)
Transaction-level standard boosts acceleration May 22, 2007
0 interfaces are slow, and for that reason, EVE worked directly with Bluespec Inc. recently to develop a transaction-level interface based on EVE's proprietary implementation of SCE-MI. Representatives of Mentor Graphics Corp. and Cadence Design Systems Inc., however, insist that there's nothing in the SCE-MI specifications that limits performance. SCE-MI is "a common interface where you can connect high-level models with a hardware accelerator or emulator," said Shrenik Mehta, Accellera chair. (EETimes)
Solution eases verification of multivoltage designs May 22, 2007
MaVeric works with third-party simulators, including Synopsys' VCS, Cadence Design Systems' NC-Sim and Mentor Graphics' ModelSim. It also works with simulation viewing and debugging tools from Novas Software. (EETimes)
Cadence updates custom IC, PCB design May 18, 2007
Cadence Design Systems is claiming significant upgrades this week (May 15) in two key areas custom IC design and pc-board design. The company claims to have a "complete" custom IC simulation and verification solution, along with an advanced constraint-driven pc-board design flow. (EETimes)
'OnDemand' models speed firmware debugging May 17, 2007
Striving to meet the demands of developers, Carbon Design Systems announced Wednesday (May 16) a new technology called "OnDemand" that speeds the performance of Carbon's Virtual System Prototype (VSP) environment for debugging. OnDemand models can automatically disable themselves when they're inactive. (EETimes)
IC verification startup takes graphical approach to test generation May 16, 2007
Hamid left AMD in 1997 to work for Cadence Design Systems Inc., where he learned a lot about system verification by talking to customers ... Hamid said Trek works with SystemVerilog, Verilog, Vera, SystemC and Cadence Design Systems' Specman testbench automation environment. (EETimes)
ChipVision Breakthrough ESL Technology Enables Interactive Creation of RTL Code Optimized for Low-Power Consumption May 14, 2007
--(BUSINESS WIRE)--ChipVision Design Systems, the low-power specialist in electronic design automation, today announced breakthrough, patented Electronic System Level (ESL) technology that lets RTL designers work interactively with system-level descriptions to generate power-optimized Register Transfer Level (RTL) code ... About ChipVision Design Systems ... ChipVision Design Systems is the leading supplier of low-power system-level EDA software tools and services. (BusinessWire)
Accellera approves SCE-MI 2.0 to speed acceleration May 12, 2007
Vendors represented on the ITC include AMD, Cadence Design Systems, Mentor Graphics, and Broadcom. One company that's already announced support for SCE-MI 2. (EETimes)
IEEE nod shifts momentum to UPF May 10, 2007
The rival Common Power Format (CPF), developed by Cadence Design Systems and now a standard, had a head start in the ongoing IC power specification standards war. Cadence uses CPF in its design flow today, and I recently heard (NXP Semiconductors and Freescale) that are using CPF. UPF tool adoption announcements are starting to show up, but I'm not aware of the use of UPF in production flows today. (EETimes)
McAfee Inc. Appoints Industry Veteran to Lead Worldwide Human Resources May 8, 2007
"Joe takes significant pride in helping organizations drive successful business growth through the acquisition of great people and development of a strong, agile corporate culture. His accomplishments demonstrate his commitment to quality leadership and make him a valuable addition to McAfee." Before coming to McAfee, Gabbert held a variety of senior leadership roles at notable technology companies across the United States and Europe, including EMC, Cadence Design Systems Inc. and Lexis/Nexis... (PR Newswire)
Constraints open new EDA standards battleground May 8, 2007
Gary Smith, chief analyst at Gary Smith EDA, noted that analog and custom design is Cadence Design Systems Inc.'s last "franchise" area. "There is an obvious need for an upgrade in today's analog methodology and tools," he said. (EETimes)
IC estimation tool adds performance analysis May 5, 2007
The new release also links design specification data directly into IC implementation flows from Cadence Design Systems, Magma Design Automation, Synopsys, and Mentor Graphics. This is done through scripts and wrappers that feed design plans into industry-standard formats. (EETimes)
UPF gets nod from IEEE May 2, 2007
As most of you know by now, UPF is one of two The other is the Common Power Format (CPF) developed by Cadence Design Systems and maintained by the After Accellera backers formed the IEEE P1801 study group. The Si2's Low Power Coalition has decided not to transfer CPF to this group. (EETimes)
IEEE's patent policy fails to quell EDA standards row May 1, 2007
But UPF has a rival: the Common Power Format (CPF), developed by Cadence Design Systems Inc. and now under the auspices of an independent EDA standards organization, the Silicon Integration Initiative (Si2). Cadence apparently believes Si2 has a superior IP protection policy, and company representatives have cited that policy as a reason for opposing the transfer of CPF copyrights to the IEEE P1801 group. (EETimes)
Is Cooley's survey bad science? May 1, 2007
As we noted in a the survey indicates that engineers are increasingly shunning specialized verification languages, are continuing to embrace Verilog, and are shifting slightly towards Synopsys and away from Cadence Design Systems in simulation ... As reported in Mike Fister, Cadence Design Systems CEO, had much the same view. (EETimes)
Open analog constraint standard urged Apr 27, 2007
It all makes sense, but there is a 600-pound gorilla in the room Cadence Design Systems, which continues to dominate the analog IC layout market, and which declines to open its Skill language. Will Cadence support an effort for an open analog constraint format. (EETimes)
New septic ordinance for county advances Apr 26, 2007
Special-design systems, used where standard systems won't work, can have as little as two feet, since the effluent is pretreated ... His version does away with the two-foot depth requirement for special design systems, instead requiring "written factual justification" for shallower depths ... All three versions add a maintenance and monitoring program for special-design systems. (The Union Democrat)
818 engineers describe verification tool use Apr 25, 2007
Engineers are increasingly shunning specialized verification languages, are continuing to embrace Verilog, and are shifting slightly towards Synopsys and away from Cadence Design Systems in simulation, according to a new "verification census" survey of 818 engineers. The survey was conducted by John Cooley, moderator of the Synopsys Users Group (ESNUG). (EETimes)
Cadence's Jan Willis wins EDA award Apr 24, 2007
Congratulations are due to Jan Willis, senior vice president of industry alliances at Cadence Design Systems, and the latest winner of the Design Automation Conference's "Women in EDA" achievement award. Richard Goering EDA Software Editor. (EETimes)
IC design management goes global Apr 24, 2007
IC Manage was to commercialize an open-source software package, cdsp4, that linked Cadence Design Systems' Design Framework II (DFII) database to the Perforce configuration management and revision control system. IC Manage still uses as its underlying data management system. (EETimes)
Schools need systems to spot troubled kids: experts Apr 21, 2007
ADVERTISEMENT (article continues below) "We may not always be able to find the needle in a haystack of troubled people, but we certainly can design systems to respond more appropriately to those who are known to be troubled and needing help," said Randy Borum, a psychologist at the Florida Mental Health Institute and one of the authors of the 2002 report about school safety. That report -- Threat Assessment in Schools: A Guide to Managing Threatening Situations and to Creating Safe School... (Scientific American)
ECSM adds signal integrity Apr 20, 2007
Originally developed by Cadence Design Systems, ECSM was donated to the which released the new version 2. 2 specification. (EETimes)
Panel wrestles with programmable, SOC divide Apr 18, 2007
The panel included Eric Filseth, corporate vice president of product marketing at Cadence Design Systems Inc.; Ralph von Vignau, senior director at NXP BV; Vittorio Peduto, general manager of the computer systems division at STMicroelectronics NV; Torhu Furuyama, general manager of the center for semiconductor Roshiba Corp.. The lack of a conclusion from such an illustrious panel was a testament to the challenges that beset the manufacturers and system-level developers at the leading edge of... (EETimes)
Synplicity fields ASIC DSP synthesis Apr 18, 2007
These include ASIC-based timing estimation for the DSP synthesis engine, special memory handling features like automatic extraction to support third-party tools, and integration with logic synthesis flows from Synopsys and Cadence Design Systems. For ASIC designers using compiled memories, the new offering automatically extracts and manages the in a separate level of hierarchy. (EETimes)
Intel tips more details on Itanium roadmap Apr 18, 2007
Although both Intel's Itanium and Xeon server CPUs ultimately will use the CSI interconnect, OEMs will not be able to design systems, at least initially, that could accommodate either CPU due to other differences in the architectures. "Long term that plug and play capability would be great to have," said Fister. (EETimes)
Mentor, EVE take fresh look at hardware-assisted verification Apr 17, 2007
Both companies will be competing with Cadence Design Systems Inc., which led the acceleration and emulation market in the most recent Gartner Dataquest surveys. Cadence's Xtreme III accelerator and emulator, introduced last fall, supports up to 72 million gates in one chassis and lets designers run transaction-based acceleration using the current SCE-MI 1. (EETimes)
Power standard marketing wars begin Apr 17, 2007
Also today, ARC International announced that it's based on CPF, originated by Cadence Design Systems and currently maintained by the Silicon Integration Initiative (Si2). Last week Calypto Design announced that its PowerPro optimization tool According to Cadence, CPF support has been announced or is upcoming from TSMC, UMC, Atrenta, ArchPro, and Virage Logic. (EETimes)
Cadence lawsuit denies damage to AmmoCore Apr 17, 2007
Founders of AmmoCore, a bankrupt EDA startup, have publicly accused Cadence Design Systems of responsibility for the startup's demise. Cadence responded Monday (April 16) by filing a motion for declaratory judgment against two AmmoCore founders who have been attempting to revive the company. (EETimes)
FSA UND IET VERANSTALTEN GEMEINSAM DAS IET & FSA INTERNATIONAL SEMICONDUCTOR FORUM Apr 11, 2007
Jan Willis, Senior Vice President of Industry Alliances, Cadence Design Systems, Inc.. John Yu, COO, Chipnuts. (BusinessWire)
Calypto power optimizer supports CPF Apr 11, 2007
The current EDA industry division over low power standards hasn't stopped Calypto Design Systems from announcing support for the Common Power Format (CPF) developed by Cadence Design Systems. But Calypto hasn't ruled out support for the rival Accellera Unified Power (UPF), company representatives say. (EETimes)
U.S. steps up car stability rules Apr 6, 2007
Some want automakers to design systems that can handle any type of oversize tires, wheels or lift kits. Nason says those products won't be allowed if they disable ESC.. (USA Today -- Money)
Synopsys boosts CCS with library tools Apr 5, 2007
There are, however, two competing current source formats Synopsys' CCS, and the supported by Cadence Design Systems and Magma Design Automation. Hoogenstryd noted that Library Compiler can generate ECSM models from CCS models. (EETimes)
CodeGear Names New CEO Apr 4, 2007
Before joining ReShape, Douglas was vice president of worldwide sales and marketing for Tality, a design-services company that was launched as a spin-off of Cadence Design Systems. Douglas' experience also includes eight years at Cadence in various senior management roles, including vice president of product marketing, with global responsibility for Cadence's segment-leading, $950-million software business. (eWeek)
Interoperable p-cell library launched Apr 4, 2007
As of now, most p-cells have been created in Cadence Design Systems' Skill programming language, and are thus restricted to Cadence IC layout tools. Moving to ensure its availability in case of an acquisition or bankruptcy, Ciranova recently placed for PyCell Studio through the Silicon Integration Initiative. (EETimes)
AWR Announces Tenth Consecutive Year of Record Growth and Financial Performance Apr 2, 2007
" In conjunction with the announcement of AWR s ongoing financial success and growth, AWR also announced that Dane Collins, former executive vice president, is taking over as CEO effective immediately. Collins, who has been with the company since 1998, replaces James Spoto, who is leaving the company in order to travel and spend more time with his family. The change is being made as part of an overall strategic plan that maps to the long-term goals of the company. James departure is part of a... (BusinessWire)
Synopsys implements UPF Mar 30, 2007
It's similar to a recent low-power announcement by Cadence Design Systems but it's a different low-power description format. EDA vendors have been locked in a between the Common Power Format (CPF), developed by and now managed by the and UPF, backed by Synopsys, Mentor Graphics, and Magma Design Automation. (EETimes)